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Patent Searching and Data


Matches 1 - 50 out of 818,435

Document Document Title
WO/2024/100979A1
The present invention is a method for evaluating a defect position in the depth direction of a wafer using X-ray topography (XRT), the wafer having a front surface and a back surface, the method characterized by comprising: a step for ca...  
WO/2024/099309A1
Provided are an array substrate and a display apparatus. The array substrate comprises: a base substrate, which comprises a main surface; a transistor, which is located on the main surface of the base substrate, and comprises an active l...  
WO/2024/101129A1
This semiconductor device includes: a chip that has a main surface; a trench electrode-type resistive structure that is formed on the main surface; and a resistive film that covers the resistive structure as a single coating target and i...  
WO/2024/098391A1
A 3D PCM architecture having a 3D PCM array with word lines and bit lines on a first die, a word line decoder on a second die, and the first die and the second die hybrid-bonded to each other in a face-to-face arrangement is disclosed he...  
WO/2024/101342A1
The present invention provides a heating device in which a temperature sensor can be disposed near a light-emitting semiconductor chip that is a heating source. The heating device 10 is constituted of a heating semiconductor chip 14 th...  
WO/2024/102274A1
Embodiments of methods are provided for thermal dry etching of a ruthenium (Ru) metal layer. In the disclosed embodiments, a substrate containing a Ru metal layer formed thereon is exposed to a gas pulse sequence, while the substrate is ...  
WO/2024/101774A1
The present invention relates to a method for manufacturing a group 3 nitride semiconductor template, the method comprising: a growing step of growing a seed layer with a nitrogen polar surface as an upper surface on a growth substrate; ...  
WO/2024/101089A1
This semiconductor device comprises: a substrate; a device region provided to the substrate; a terminal covering the device region in a planar view; and at least three pseudo bumps disposed densely in a layout so as to be positioned at v...  
WO/2024/102501A1
The present disclosure relates to semiconductor structures, methods for making the same, and methods using the same. The semiconductor structure comprises a first substrate, a second substrate on the first substrate, a first bonding laye...  
WO/2024/102155A1
A gas curtain device for a front opening unified pod has a casing. At least one first gas guide plate is disposed in the casing. The first gas guide plate has a first gas guide region. The first gas guide region has a plurality of first ...  
WO/2024/098567A1
The embodiments of the present disclosure relate to a memory, a semiconductor structure and a manufacturing method for the semiconductor structure. The manufacturing method for the semiconductor structure comprises: providing a substrate...  
WO/2024/102506A2
Described herein is a method for depositing a two-dimensional material film on a substrate. In some embodiments, the method comprises using a reactor with two regions to decompose the first precursor. In some embodiments, the method comp...  
WO/2024/101229A1
Disclosed is a plasma processing apparatus for removing a film, which is formed on the peripheral edge of a substrate, by means of a plasma, the plasma processing apparatus being provided with: a processing chamber which houses a substra...  
WO/2024/102293A1
The invention provides a chemical-mechanical polishing composition comprising: (a) silica abrasive; (b) an amine-based compound, wherein the amine-based compound comprises a carbon to nitrogen ratio of about 1:1 to about 3:1; (c) optiona...  
WO/2024/101232A1
The present disclosure provides a film which comprises a base material and an antistatic layer, wherein the antistatic layer is formed of a cured product of a composition that contains an antistatic agent, a polymerization initiator and ...  
WO/2024/101077A1
This shaping device (101) comprises: a base part (12) that can support a plate-shaped object; a plurality of support pins (4) as a support member that can take a first state protruding upward from the base part (12) in order to support t...  
WO/2024/100499A1
Provided is a semiconductor device having a small footprint. This semiconductor device has a transistor and a first insulating layer. The transistor has: a first conductive layer; a second conductive layer having a region that overlaps t...  
WO/2024/102313A1
A reticle container includes an outer pod and an inner pod, the inner pod configured to contain a reticle. The outer pod includes a pod door including a purge port, and a pod dome including one or more channels configured to receive a pu...  
WO/2024/101354A1
[Problem] To improve throughput when transporting at least two substrates. [Solution] Provided is a substrate transport system comprising: a transport means having a holding member that holds at least two substrates as a set parallel to ...  
WO/2024/101144A1
The present disclosure describes a substrate processing device that can etch a relatively hard film provided on the peripheral edge of a substrate at a relatively high etching rate without the use of plasma. The substrate processing de...  
WO/2024/098851A1
The present disclosure relates to a semiconductor structure and a forming method therefor. The forming method for a semiconductor structure comprises the following steps: providing a substrate; forming a first conductive layer on the sub...  
WO/2024/101030A1
This method for producing a multilayer device executes a first formation step, a second formation step and a bonding step. In the first formation step, a cutting part for individualizing a plurality of chip regions is formed in a first b...  
WO/2024/099378A1
Disclosed in the present invention are a conformal-shielding packaging method and structure for a substrate. The packaging method comprises the following steps: mounting a plurality of electronic elements on a substrate to form a plurali...  
WO/2024/076618A3
A temperature monitoring system includes a semiconductor member mounted onto the surface of an object having a surface whose temperature is to be monitored. The semiconductor member has a temperature-dependent bandgap with an absorption ...  
WO/2024/100958A1
The present invention is a semiconductor epitaxial substrate manufacturing method characterized by comprising: an ion implantation step for implanting H+ into the surface of a 4H-SiC substrate; and an epitaxial growth step for epitaxiall...  
WO/2024/098637A1
The present invention provides a silicon carbide planar MOSFET device and a manufacturing method therefor. The method comprises: arranging shallow channels on the basis of a (0001) crystal surface where the channel current is still paral...  
WO/2024/101896A1
The present disclosure relates to a high-temperature electrostatic chuck, and the objective thereof is to provide a high-temperature electrostatic chuck on a surface for chucking a wafer or glass. To this end, provided is a high-temperat...  
WO/2024/101204A1
Provided are a light detection device and a multilayer substrate which can suppress a reduction in properties. The light detection device comprises: a multilayer part having a first substrate part, a second substrate part, and a third su...  
WO/2024/101006A1
In the present invention, a semiconductor device includes: a first-electroconductivity-type second medium-concentration region 121 that is selectively formed on the surface layer part of an outer periphery region 9 on the first-main-surf...  
WO/2024/102247A1
A substrate process station includes a housing including a transport region and process region. The process station further includes a magnetic levitation assembly disposed in the transport region configured to levitate and propel a subs...  
WO/2024/102963A1
A method of forming a structure on a substrate that includes forming a tungsten nucleation layer within at least one opening within a multi-tier portion of a substrate. The method includes exposing the nucleation layer to a nitrogen-cont...  
WO/2024/098672A1
Embodiments of the present invention provide a semiconductor structure and a manufacturing method therefor. The semiconductor structure comprises: a substrate; and a plurality of bit lines, arranged on the substrate, each bit line compri...  
WO/2024/072691A3
The present disclosure provides a reaction chamber, and methods of using the same, wherein the reaction chamber includes a mesh cathode, a first anode, a second anode, and a reaction chamber body, wherein the reaction chamber body is hol...  
WO/2024/101019A1
The present invention provides a substrate for high frequency devices, the substrate being obtained by forming a nitride semiconductor film on an SOI substrate, wherein: the SOI substrate is a TRSOI substrate wherein a trap rich layer, w...  
WO/2024/098662A1
The present disclosure relates to a semiconductor structure and a preparation method therefor. The semiconductor structure comprises a substrate (100), a dielectric layer (200), and conductive plugs (310), wherein the dielectric layer (2...  
WO/2024/099381A1
Disclosed in the present invention are a CSP electromagnetic shielding chip and package structure, and a method, a circuit structure and an electronic device. The CSP electromagnetic shielding chip comprises: a chip body, the lower surfa...  
WO/2024/102379A1
Wafer tilt is measured and compensated based on corrected measurements of tilt derived from a set of height measurements across a wafer. A set of wafer orientation correction values is generated by a measurement system at a large number ...  
WO/2024/101130A1
This semiconductor device includes: a chip that has a main surface; a trench electrode-type gate structure that is formed on the main surface and has a resistive portion; a pad electrode that is disposed on the main surface so as to over...  
WO/2024/100489A1
Provided is a semiconductor device which exhibits favorable electrical properties. This semiconductor device has a transistor, a first interlayer insulating layer, and a second interlayer insulating layer on the first interlayer insulati...  
WO/2024/102220A1
Methods and apparatus for clamping a substrate comprise i. placing a substrate on a clamping surface of a substrate support having a plurality of electrodes spaced from one another including a first electrode and a second electrode; ii. ...  
WO/2024/102146A1
Embodiments of the present disclosure generally relate to a system used in a semiconductor device manufacturing process. More specifically, embodiments provided herein generally include apparatus and methods for synchronizing and control...  
WO/2024/102824A1
A system for forming a workpiece within an enclosure may include at least one workhead disposed within the enclosure and configured to contact and hold a workpiece. The system may further include a tooling assembly disposed within the en...  
WO/2024/101107A1
The present invention relates to a substrate-cleaning device and a substrate-cleaning method, in which a cleaning tool is brought into contact with the front or back surface of a substrate, e.g., a wafer, to clean the front or back surfa...  
WO/2024/100876A1
This wafer stage 10 comprises a ceramic plate 20, a cooling plate 30, a space layer 34, and a space-layer-forming part 36. The ceramic plate 20 has a wafer placement unit 22 on the top surface and has built-in electrodes 24, 26. The cool...  
WO/2024/102937A1
Systems and methods for selective modification of nanoparticle structures are described. The selective modification processes include applying a localized heat source to the deposited nanoparticle structures and removing the areas that a...  
WO/2024/100181A1
Described is a block copolymer, which is an AB diblock copolymer with a first block A of structure (I) and a second block B of structure (II), wherein R and Ri are individually selected from a C-1 to C-4 alkyl, where the mole % of repeat...  
WO/2024/099686A1
Systems, methods, and computer software are disclosed for determining overlays. One method can include performing a component analysis on a set of Scanning Electron Microscope (SEM) images to obtain coefficients of one or more selected c...  
WO/2024/100948A1
[Problem] To provide a dust collector that can be installed in a desired location without the use of a power generator or a fixing member. [Solution] A dust collector 1A comprises: a first electrode layer 12 formed of a conductor-contain...  
WO/2024/101607A1
A substrate loading device according to an embodiment of the present invention comprises: a boat in which a plurality of substrates are seated; a paddle on which the boat is mounted; a drive unit which loads or unloads the paddle into or...  
WO/2024/099436A1
Disclosed in the present application are a trench-type SiC MOSFET device structure and a manufacturing method therefor. The method comprises: growing a SiC epitaxial layer on a SiC substrate; forming a body region in the SiC epitaxial la...  

Matches 1 - 50 out of 818,435