Title:
【発明の名称】先進のプロセッサにおけるメモリ・データ・エリアシング方法および装置
Document Type and Number:
Japanese Patent JP2001504957
Kind Code:
A
Abstract:
Apparatus and a method for storing data already stored at an often utilized memory address in registers local to a host processor and maintain the data in the registers and memory consistent so that the processor may respond more rapidly when a memory address is to be accessed.
Inventors:
Wing, Malcolm Jay
Kelly, Edmund Jay
Kelly, Edmund Jay
Application Number:
JP51579998A
Publication Date:
April 10, 2001
Filing Date:
September 22, 1997
Export Citation:
Assignee:
Transmeta Corporation
International Classes:
G06F12/08; G06F9/318; G06F9/34; G06F9/38; G06F9/455; (IPC1-7): G06F12/08; G06F9/34; G06F12/08
Domestic Patent References:
| JPH04246728A | 1992-09-02 | |||
| JPH05508503A | 1993-11-25 | |||
| JPS6054048A | 1985-03-28 | |||
| JPS5582356A | 1980-06-21 | |||
| JPH076033A | 1995-01-10 | |||
| JPH07505968A | 1995-06-29 | |||
| JPH07505494A | 1995-06-15 | |||
| JPH03255535A | 1991-11-14 | |||
| JPH05508504A | 1993-11-25 |
Attorney, Agent or Firm:
Kazuo Shamoto (4 outside)