Title:
【発明の名称】サーマルディテクタアレー
Document Type and Number:
Japanese Patent JP2002500763
Kind Code:
A
Abstract:
A thermal detector device comprising an array of thermal detector elements, an array of microbridge structures comprising the array of thermal detector elements, readout silicon integrated circuitry (ROIC) and an interconnect layer on which the array of microbridge structures are arranged. The interconnect layer comprises a plurality of conducting interconnect channels providing an electrical connection between the microbridge structures and input contacts on the ROIC such that the microbridge structures are in electrical contact with, but are separated from, the readout silicon integrated circuitry. As the interconnect layer separates the microbridge structures from the ROIC, the detector material, typically a ferroelectric material, may be fabricated on the microbridge structures at a deposition or anneal temperature which is not limited by the avoidance of damage to the ROIC. Deposition temperatures of at least 500° C. or, preferably, at higher temperatures e.g. 700° C.-900° C., may therefore be used, enabling the fabrication of high performance ferroelectric or microbolometer thermal detector arrays. The invention also relates to a method of fabricating high performance thermal detector arrays comprising an interconnect layer.
Inventors:
Watton Rex
Hilsum Cyril
Hilsum Cyril
Application Number:
JP50034999A
Publication Date:
January 08, 2002
Filing Date:
May 14, 1998
Export Citation:
Assignee:
United Kingdom
International Classes:
G01J5/10; G01J5/20; G01J5/34; H01L37/02; (IPC1-7): G01J5/10; H01L37/02
Attorney, Agent or Firm:
Minoru Nakamura (9 outside)