Title:
【発明の名称】圧縮データのロード可能チップカード
Document Type and Number:
Japanese Patent JP2002531974
Kind Code:
A
Abstract:
The invention concerns a chip card receiving fields of compressed data encapsulated in frames including an indication of the expected length of decompressed data and a length of compressed data. The frames are received in a storage unit and the processor of the card decompresses each data field according to a decompression algorithm over a length based on the indication of the expected length and writes the decompressed data in another buffer storage unit. Several algorithms and optionally several decompression models are installed in the card storage unit, and a couple thereof is selected by the number read in the heading of each frame received.
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Inventors:
Briousel, Benoa
Application Number:
JP2000585837A
Publication Date:
September 24, 2002
Filing Date:
November 04, 1999
Export Citation:
Assignee:
GEMPLUS
International Classes:
G06F3/06; G06F3/08; G07F7/10; H03M7/40; G06K19/07; (IPC1-7): H03M7/40; G06F3/06; G06F3/08; G06K19/07
Attorney, Agent or Firm:
Keiichi Ota