Title:
ロー・プロセッサ・ロード・アグレゲイション・デバイス
Document Type and Number:
Japanese Patent JP2005516440
Kind Code:
A
Abstract:
A system includes a low-processor-load aggregation device (250) having (a) at least one multi-channel device (218, 228, 238), the multi-chanel device (218, 228, 238) having at least one internal network tag associated with at least one network station (108, 112), and (b) a host-processor-controlled routing device (204) operably coupled with the internal network (102), the host-processor-controlled routing device (204) configured to coordinate at least one network address with the internal network tag (s) associated with the network station (s) (108, 112). Other embodiments include methods for coordinating an external network-station packet with an internal private-network address of a low-processor-load aggregation device (250), and coordinating an external network-station control message with an internal private-network address of a low-processor-load aggregation device
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Inventors:
Peshkin Joel Dee
Pinco Alexei E
Whitfield Michael Sea
Pinco Alexei E
Whitfield Michael Sea
Application Number:
JP2003562806A
Publication Date:
June 02, 2005
Filing Date:
January 21, 2003
Export Citation:
Assignee:
Conexant Systems, Inc.
International Classes:
H04L12/64; H04L12/66; H04L12/931; H04L29/06; H04M3/00; H04L29/12; (IPC1-7): H04L12/56; H04L12/66; H04M3/00
Attorney, Agent or Firm:
Koichi Oishi
Ikuo Shinoda
Ikuo Shinoda