Title:
プロセッサ電力状態を考慮するメモリコントローラ
Document Type and Number:
Japanese Patent JP2006517315
Kind Code:
A
Abstract:
When a processor in a computer system is placed in a low power mode, power consumption of the computer system may be further reduced by reducing power consumption of one or more components of a memory coupled to the processor and by reducing power consumption of one or more components of a controller device coupled to the memory. The processor and the controller device may share the memory.
Inventors:
Samson, eric
Naval, Aditya
Jensen, Sam
Sritania Ratana, Siripon
Chen, Win
Naval, Aditya
Jensen, Sam
Sritania Ratana, Siripon
Chen, Win
Application Number:
JP2006500783A
Publication Date:
July 20, 2006
Filing Date:
January 02, 2004
Export Citation:
Assignee:
Intel Corporation
International Classes:
G06F1/32; G06F1/04; G06F12/00
Domestic Patent References:
| JPH10228340A | 1998-08-25 | |||
| JPH0683491A | 1994-03-25 | |||
| JP2002032163A | 2002-01-31 | |||
| JP2000174690A | 2000-06-23 | |||
| JPH04205227A | 1992-07-27 | |||
| JPH11282587A | 1999-10-15 | |||
| JP2002311918A | 2002-10-25 |
Attorney, Agent or Firm:
Tadahiko Ito
Shinsuke Onuki
Tadashige Ito
Shinsuke Onuki
Tadashige Ito