Title:
薄膜トランジスタを形成する方法およびこれに関連するシステム
Document Type and Number:
Japanese Patent JP2006519478
Kind Code:
A
Abstract:
Methods of forming thin film transistors and related systems are described. In one embodiment, a method forms source/drain material over a substrate using a low temperature formation process. A channel layer is formed over the substrate using a low temperature formation process. A gate insulating layer is formed over the substrate using a low temperature formation process. A gate is formed over the substrate using a low temperature formation process. The low temperature formation processes that are utilized are conducted at temperatures that are no greater than about 200-degrees C.
Inventors:
Peterson, Paul
Stacyac, james
Stacyac, james
Application Number:
JP2006501165A
Publication Date:
August 24, 2006
Filing Date:
February 13, 2004
Export Citation:
Assignee:
Hewlett-Packard Development Company
International Classes:
H01L29/786; H01L21/336; H01L29/417; H01L51/40; H01L51/00; H01L51/30
Attorney, Agent or Firm:
Satoshi Furuya
Takahiko Mizobe
Kiyoharu Nishiyama
Takahiko Mizobe
Kiyoharu Nishiyama