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Title:
多数の時間領域群を有するシステムでイベント群を時間順序付けする装置及び方法
Document Type and Number:
Japanese Patent JP2007513425
Kind Code:
A
Abstract:
A system and method time orders events that occur in various portions of the system (10) where different time domains (12, 22, 32) exist. Timestamping circuitry (e.g. 40) is provided in each of a plurality of functional circuits or modules (14, 24, 34). The timestamping circuitry provides a message that indicates a point in time when a predetermined event occurs. An interface module (70) is coupled to each of the plurality of functional circuits (14, 24, 34). The interface module (70) provides control information to the plurality of functional circuits (14, 24, 34) to indicate at least one operating condition that triggers the predetermined event, and to optionally specify a message format. The interface module (70) provides a timestamping message from one, several or all time domains at a common interface port (90).

Inventors:
Moyer, William Sea.
Collins, Richard G.
Fitzsimons, Michael Di.
Nearing, Jason Tee.
Application Number:
JP2006542588A
Publication Date:
May 24, 2007
Filing Date:
November 04, 2004
Export Citation:
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Assignee:
Freescale Semiconductor, Inc.
International Classes:
G06F11/34; G06F11/00; G06F11/28
Domestic Patent References:
JP2003256245A2003-09-10
JP2002312202A2002-10-25
JP2002202898A2002-07-19
JP2000259455A2000-09-22
JPH096464A1997-01-10
JPH08137572A1996-05-31
JPH03113647A1991-05-15
JPH027136A1990-01-11
JPH05250342A1993-09-28
Attorney, Agent or Firm:
Mamoru Kuwagaki