Title:
半導体素子のテストフィクスチャおよび試験用アセンブリのための電気コネクタ
Document Type and Number:
Japanese Patent JP2007529748
Kind Code:
A
Abstract:
An interconnect assembly is for use in connection with a semiconductor device under test (DUT) having a plurality of leads to electronic test equipment. The interconnect assembly includes a cable including a plurality of wires with at least one wire for sensing a signal from a DUT, at least one wire for a forcing signal to the DUTY and at least one wire for a guarding signal driven by the same electrical potential as the forcing signal. A male connector includes the plurality of wires, an outer metal coating surrounding the plurality of wires, and an insulating coating around the outer metal coating. A receptacle connector is for receiving the male connector and plurality of wires with corresponding contacts.
Inventors:
Cuevas Peter Pea.
Application Number:
JP2007504103A
Publication Date:
October 25, 2007
Filing Date:
March 16, 2005
Export Citation:
Assignee:
QUALITAU INCORPORATED
International Classes:
G01R31/28; H01R13/658
Domestic Patent References:
| JPH04131786U | 1992-12-04 | |||
| JPH04131786U | 1992-12-04 |
Foreign References:
| US20030082936A1 | 2003-05-01 | |||
| US5144098A | 1992-09-01 | |||
| US20030082936A1 | 2003-05-01 | |||
| US5144098A | 1992-09-01 |
Attorney, Agent or Firm:
Meisei International Patent Office