Title:
ウェハ貫通相互接続部を形成する方法およびそれから得られる構造体
Document Type and Number:
Japanese Patent JP2009503906
Kind Code:
A
Abstract:
Semiconductor devices including through-wafer interconnects are disclosed. According to an embodiment of the present invention, a semiconductor device may comprise a substrate having a first surface and a second, opposing surface, and a through-wafer interconnect extending into the first surface of the substrate. The through-wafer interconnect may include an electrically conductive material extending from the first surface of the substrate to the second, opposing surface of the substrate. The through-wafer interconnect may also include a first dielectric material disposed between the electrically conductive material and the substrate and extending from the second, opposing surface of the substrate to the first portion of the conductive material. Additionally, the through-wafer interconnect may include a second dielectric material disposed over a portion of the electrically conductive material and exhibiting a surface that defines a blind aperture extending from the first surface toward the second, opposing surface.
Inventors:
Farnworth, Warren, M.
Wood, Alan, Gee.
Wood, Alan, Gee.
Application Number:
JP2008525170A
Publication Date:
January 29, 2009
Filing Date:
August 02, 2006
Export Citation:
Assignee:
APPLIED MATERIALS,INCORPORATED
International Classes:
H01L21/3205; H01L23/52
Domestic Patent References:
| JP2005012180A | 2005-01-13 | |||
| JP2005116623A | 2005-04-28 | |||
| JPH11251320A | 1999-09-17 |
Attorney, Agent or Firm:
Nomura Yasuhisa
Yoshiyuki Osuga
Yoshiyuki Osuga
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