Title:
マスタおよびスレーブを有するデータ処理デバイスにおける電力管理
Document Type and Number:
Japanese Patent JP2009545048
Kind Code:
A
Abstract:
A device, such as an integrated circuit is described including master units, and slave units connected by an interconnect. In addition to the normal data signals and address signals passed with a transaction, there are also passed usage signals which specify the time interval until a next transaction will be sent to a slave unit. A local slave power controller is responsive to such usage signals to switch into a low power mode and pre-emptively switch back to an operational mode in time to respond to the next transaction to be received.
Inventors:
Andrew Tune
Application Number:
JP2009521321A
Publication Date:
December 17, 2009
Filing Date:
July 28, 2006
Export Citation:
Assignee:
Arm limited
International Classes:
G06F1/32
Attorney, Agent or Firm:
Masatake Shiga
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro