Title:
MODULE
Document Type and Number:
Japanese Patent JP2018180668
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To reduce a total capacity value of capacitors which are externally mounted on multiple semiconductor devices.SOLUTION: A module 1 comprises (m) pieces of semiconductor devices 10, a wiring member 20, (n) pieces of capacitors 30, and a sequencer 40. Each of the (m) pieces of the semiconductor devices 10 includes a power source output terminal REGO which is connected to an output end of a power supply circuit (non-illustrated). The wiring member 20 is laid in such a manner that the power source output terminals REGO of the (m) pieces of the semiconductor devices 10 are short-circuited. The (n) pieces of the capacitors 30 are shared by the power source output terminals REGO of the (m) pieces of the semiconductor devices 10 via the wiring member 20. The sequencer 40 turns on/off the power supply circuits of the (m) pieces of the semiconductor devices 10 in a time dividing manner. In the case of m=n, for example, a capacity value of each of the (n) pieces of the capacitors 30 may be set to C/m (in which C is a minimum capacity value of capacitors required at a minimum for normally operating each of the power supply circuits of the (m) pieces of the semiconductor devices 10 alone).SELECTED DRAWING: Figure 1
Inventors:
AMINAGA HIROYUKI
SAITO HIROHARU
SAITO HIROHARU
Application Number:
JP2017075069A
Publication Date:
November 15, 2018
Filing Date:
April 05, 2017
Export Citation:
Assignee:
ROHM CO LTD
International Classes:
G05F1/56; G06F1/26
Attorney, Agent or Firm:
Sano patent office