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Title:
A/D CONVERTER
Document Type and Number:
Japanese Patent JP2019122013
Kind Code:
A
Abstract:
To provide an A/D converter that can reduce a cycle number associated with A/D conversion.SOLUTION: This A/D converter comprises: an integrator that has an operational amplifier, a first feedback capacitance and a second feedback capacitance; a quantizer that outputs a quantization result of an output signal of the operational amplifier; and a DAC that has a DAC capacitance connected to an input terminal of the operational amplifier and that subtracts charge accumulated in the feedback capacitance. The DAC capacitance has a terminal, which is opposite to the terminal connected to the operational amplifier, connected to an output terminal of the operational amplifier. The DAC performs a subtraction operation in which an analog signal is converted to a digital value by repeating subtraction of the charge accumulated in the feedback capacitance on the basis of the quantization result, and performs a cyclic operation in which the analog signal is converted to the digital value by sequentially repeating subtraction and amplification on the basis of the quantization result for the charge accumulated in either one of the two feedback capacitances.SELECTED DRAWING: Figure 1

Inventors:
NEZUKA TOMOHIRO
Application Number:
JP2018002771A
Publication Date:
July 22, 2019
Filing Date:
January 11, 2018
Export Citation:
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Assignee:
DENSO CORP
International Classes:
H03M1/40
Domestic Patent References:
JP2017050776A2017-03-09
JP2006303671A2006-11-02
JP2005136540A2005-05-26
JPS6051901A1985-03-23
JPH04290310A1992-10-14
JP2016039490A2016-03-22
JP2000013232A2000-01-14
Attorney, Agent or Firm:
Kazuyuki Yahagi
Taihei Nonobe
Takanori Kubo