Title:
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2020047729
Kind Code:
A
Abstract:
To provide a technique capable of suppressing cracks in an insulating layer formed in a trench.SOLUTION: A manufacturing method of a semiconductor device includes a step of forming a first insulating layer by performing chemical vapor deposition under a pressure of 150 Pa or more and 300 Pa or less on an inner surface of a trench formed on an upper surface of the semiconductor substrate, a first heat-treating step of heat-treating the semiconductor substrate and shrinking the first insulating layer after forming the first insulating layer, a step of filling the trench by forming a second insulating layer on a surface of the first insulating layer by performing chemical vapor deposition under a pressure of 150 Pa or more and 300 Pa or less after the first heat-treating step, and a second heat-treating step of heat treating the semiconductor substrate after forming the second insulating layer.SELECTED DRAWING: Figure 5
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Inventors:
KUMITA MASAHIRO
KUCHIKI KATSUHIRO
URAGAMI HATA
KUCHIKI KATSUHIRO
URAGAMI HATA
Application Number:
JP2018174074A
Publication Date:
March 26, 2020
Filing Date:
September 18, 2018
Export Citation:
Assignee:
TOYOTA MOTOR CORP
International Classes:
H01L21/316; H01L21/336; H01L29/12; H01L29/78
Domestic Patent References:
| JP2009542011A | 2009-11-26 | |||
| JP2015126027A | 2015-07-06 | |||
| JP2013243375A | 2013-12-05 | |||
| JP2012169658A | 2012-09-06 | |||
| JP2015061015A | 2015-03-30 | |||
| JP2005340552A | 2005-12-08 |
Attorney, Agent or Firm:
Kaiyu International Patent Office