Title:
【発明の名称】半導体不揮発性RAM
Document Type and Number:
Japanese Patent JP2500871
Kind Code:
B2
Abstract:
A semiconductor nonvolatile RAM having a dynamic RAM cell and an E2PROM cell. The dynamic RAM cell includes a first transistor having a current path having one end connected to a bit line and a gate connected to a word line. A storage region is connected to another end of the current path. The E2PROM cell includes a second transistor including a source region, a drain region, a channel region having first and second parts between the source and drain regions, a floating gate above the first part of the channel region and the source region, and a control gate. The drain of the second transistor is connected to the another end of the current path of the first transistor. Another end of the storage region is above the second part of the channel region and the floating gate. The channel region of the second transistor is rendered conductive in accordance with data stored in the storage region of the dynamic RAM cell.
Inventors:
OCHII KYOBUMI
Application Number:
JP9365491A
Publication Date:
May 29, 1996
Filing Date:
March 30, 1991
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H01L27/105; G11C14/00; H01L21/8247; H01L27/10; H01L29/788; H01L29/792; (IPC1-7): H01L27/105; H01L21/8247; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Takehiko Suzue