Title:
【発明の名称】2値化回路
Document Type and Number:
Japanese Patent JP3074683
Kind Code:
B2
Abstract:
PURPOSE:To obtain fine image information by capturing the contrast of a background part from which micro change is eliminated with a large differentiation time constant with an object part, and after that, performing a binarization processing capturing the micro change of only the object part with a small differentiation time constant. CONSTITUTION:CCD differentiation output differentiated with a large time constant gamma1 at a first differentiation circuit 11a is binarized with the reference voltages VH1 and VL1 of comparators 12a 1 and 12a 2, and binary output is outputted from a first holding circuit 13a. Meanwhile, the CCD differentiation output differentiated with a small time constant gamma2 at a second differentiation circuit 11b is binarized with the reference voltages VH2 and VL2 of comparators 12b 1 and 12b 2, and the binary output is outputted from a second holding circuit 13b. Therefore, the OR synthesis of the binary signal from which micro signal change is eliminated in advance with a first differentiation processing and the binary signal including the micro signal change with a second differentiation processing performed. In such a way, the reading of the image information accurately is performed without missing the fine part of black image information.
Inventors:
Teruo Sano
Application Number:
JP14919489A
Publication Date:
August 07, 2000
Filing Date:
June 12, 1989
Export Citation:
Assignee:
CASIO COMPUTER CO.,LTD.
International Classes:
G06T1/00; G06T5/00; H04N1/40; H04N1/403; (IPC1-7): H04N1/403; G06T1/00; G06T5/00
Domestic Patent References:
| JP5676682A |
Attorney, Agent or Firm:
Takehiko Suzue (3 outside)