Title:
【発明の名称】アツテネータ回路
Document Type and Number:
Japanese Patent JP3362931
Kind Code:
B2
Abstract:
An attenuator circuit (20) which has a small insertion loss and also has a broad tolerance toward the fluctuation of the element parameter. An attenuator stage (10C) having the largest attenuation quantity of a plurality of attenuator stages is formed with a pi -type attenuator stage, and an attenuator stage (10A) having the smallest attenuation quantity of the plurality of attenuator stages is formed with a T-type attenuator stage. In this way, an attenuator stage having a large attenuation quantity whose precision of the attenuation quantity is apt to be detracted is formed of a pi -type attenuator stage so that the precision becomes high, further, an attenuator stage having a small attenuation quantity is formed of a T-type attenuator stage so that the insertion loss can be lowered.
Inventors:
Kazumasa Obama
Application Number:
JP26838693A
Publication Date:
January 07, 2003
Filing Date:
September 30, 1993
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H03H7/24; H03H11/24; (IPC1-7): H03H7/24; H03H11/24
Domestic Patent References:
| JP6440914U | ||||
| JP288321U |
Attorney, Agent or Firm:
Keiki Tanabe