Title:
フラッシュメモリの消去コマンドラッチ回路
Document Type and Number:
Japanese Patent JP3615812
Kind Code:
B2
Inventors:
Yukiko Maeda
Application Number:
JP31993294A
Publication Date:
February 02, 2005
Filing Date:
December 22, 1994
Export Citation:
Assignee:
Renesas lsi design Co., Ltd.
Renesas Technology Corp.
Renesas Technology Corp.
International Classes:
G06F12/14; G11C16/02; G11C16/06; G11C17/00; (IPC1-7): G11C16/02; G06F12/14
Domestic Patent References:
| JP4221496A | ||||
| JP5289943A | ||||
| JP8147987A |
Attorney, Agent or Firm:
Hiroaki Tazawa
Hideaki Tazawa
Konobu Kato
Hamada Hatsune
Konobu Kato
Hideaki Tazawa
Konobu Kato
Hamada Hatsune
Konobu Kato