Title:
リアルタイム組込み簡易モニタプログラム
Document Type and Number:
Japanese Patent JP4068106
Kind Code:
B2
Abstract:
A processor context stored in a stack area at a time of an interrupt occurrence is saved in a context saving area of an ICB corresponding to an ISR that is interrupted. The ISR corresponding to the interrupt is set to an execution-waiting state. An ICB having a highest priority from among the ICBs that are set to the execution-waiting state is selected. A processor context saved in a context saving area of the selected ICB is stored in the stack area. An ISR corresponding to an ICB selected by an interrupt return command is executed.
Inventors:
Shigeki Nankaku
Teiichiro Inoue
Masami Iwahashi
Toshihiro Kawakami
Teiichiro Inoue
Masami Iwahashi
Toshihiro Kawakami
Application Number:
JP2005228523A
Publication Date:
March 26, 2008
Filing Date:
August 05, 2005
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
G06F9/48
Domestic Patent References:
| JP4287233A | ||||
| JP10254516A | ||||
| JP2003345612A | ||||
| JP8077025A | ||||
| JP1298440A | ||||
| JP10049386A | ||||
| JP5257718A | ||||
| JP6187175A | ||||
| JP3157733A | ||||
| JP2004152322A | ||||
| JP2005078450A |
Other References:
Lui Sha et al.,Priority Inheritance Protocols: An Approach to Real-Time Synchronization,IEEE Transaction on Computers,1990年 9月,Vol.39, No.9,pp.1175-1185
Attorney, Agent or Firm:
Hiroaki Sakai