Title:
不揮発性半導体メモリ装置およびデータ書き込み制御方法
Document Type and Number:
Japanese Patent JP4086583
Kind Code:
B2
Abstract:
A non-volatile semiconductor memory device, is provided, which comprises a plurality of memory cells capable of electrically writing and erasing data and a voltage control section for controlling a control voltage to be applied to each of the plurality of row lines. The voltage control section comprises a storing section and a voltage output section. The storing section stores the value of the control voltage, which is calculated to permit a threshold voltage distribution to be within a predetermined range, in accordance with the threshold voltage distribution of the plurality of memory cells in each chip. The voltage output section outputs the control voltage having the value stored in the storing section to each of the plurality of row lines.
Inventors:
Yasuaki Hirano
Shuichiro Kawachi
Shuichiro Kawachi
Application Number:
JP2002230891A
Publication Date:
May 14, 2008
Filing Date:
August 08, 2002
Export Citation:
Assignee:
Sharp Corporation
International Classes:
G11C16/02; H01L21/66; G11C11/56; G11C16/06; G11C16/30; G11C29/00
Domestic Patent References:
| JP8063988A | ||||
| JP2123597A | ||||
| JP9502828A | ||||
| JP2000222892A | ||||
| JP2001084788A | ||||
| JP10199263A | ||||
| JP2000123584A |
Attorney, Agent or Firm:
Hidesaku Yamamoto
Takaaki Yasumura
Takeshi Oshio
Takaaki Yasumura
Takeshi Oshio