Title:
SOI構造を有する半導体装置の製造方法
Document Type and Number:
Japanese Patent JP4145946
Kind Code:
B2
Inventors:
Yasuo Yamaguchi
Shigenobu Maeda
Money
Shigenobu Maeda
Money
Application Number:
JP2007030916A
Publication Date:
September 03, 2008
Filing Date:
February 09, 2007
Export Citation:
Assignee:
Renesas Technology Corp.
International Classes:
H01L29/786
Domestic Patent References:
| JP59132677A | ||||
| JP3129777A | ||||
| JP5021460A | ||||
| JP7106594A | ||||
| JP7176743A | ||||
| JP7176753A | ||||
| JP7193248A |
Attorney, Agent or Firm:
Kuro Fukami
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai