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Title:
容量検出回路及び検出方法並びにそれを用いた指紋センサ
Document Type and Number:
Japanese Patent JP4164427
Kind Code:
B2
Abstract:

To provide a capacitance detecting circuit and a method, and a finger print sensor, which improve S/N ratios by reducing the effects of disturbance noise, and detect a very small capacitance value Cs and a capacitance change value ΔCs of a sensor element constituted of row wires and column wires with sufficient sensitivity.

The capacitance detecting circuit comprises: a PN code generating means for detecting changes in the capacitance of a capacitance sensor of a matrix shape constituted by crossing the column wires across a plurality of the row wires, changing the phase of a created PN code in time-series order, and outputting a row drive signal; a row wire drive means for selecting and driving a plurality of row wires corresponding to the row drive signal; a capacitance detecting means connected to the column wires for outputting a detection voltage acquired by converting the sum of changes in the capacitance of intersection parts corresponding to the selected row wires into a voltage; and a decoding arithmetic circuit for decoding a data string of the detected voltage time-serially outputted from the capacitance detecting means by prescribed computations on the basis of the PN code and separating a voltage corresponding to a change in the capacitance of each intersection part.

COPYRIGHT: (C)2005,JPO&NCIPI


Inventors:
Yuichi Umeda
Junichi Saito
Application Number:
JP2003344767A
Publication Date:
October 15, 2008
Filing Date:
October 02, 2003
Export Citation:
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Assignee:
ALPS ELECTRIC CO.,LTD.
International Classes:
G01B7/28; A61B5/117; G06T1/00
Domestic Patent References:
JP9097327A
JP2030034U
JP11352917A
JP2001186105A
JP2001358709A
JP9126918A
Attorney, Agent or Firm:
Sumio Tanai
Masatake Shiga
Tadashi Takahashi
Hideyuki Sugiura
Suzuki Mitsuyoshi
Yasuhiko Murayama
Tadao Takashiba