Title:
半導体集積回路装置及びその検査方法
Document Type and Number:
Japanese Patent JP4167567
Kind Code:
B2
Abstract:
A semiconductor integrated circuit device includes: first and second nonvolatile memory elements; a first amplifier for amplifying an output signal from the first nonvolatile memory element to output the amplified signal; and a second amplifier for outputting to the first amplifier a control signal generated by amplifying an output signal from the second nonvolatile memory element. The second amplifier fixes the output signal from the first amplifier at a high potential or a low potential based on data stored in the second nonvolatile memory element.
Inventors:
Masanori Shirahama
Masashi Agata
Toshiaki Kawasaki
Nishihara Ryuji
Masashi Agata
Toshiaki Kawasaki
Nishihara Ryuji
Application Number:
JP2003308613A
Publication Date:
October 15, 2008
Filing Date:
September 01, 2003
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
G11C16/02; G11C7/06; G11C7/10; G11C16/06
Domestic Patent References:
| JP2002063793A | ||||
| JP8036895A | ||||
| JP2001229690A | ||||
| JP2003016797A | ||||
| JP2002245788A |
Attorney, Agent or Firm:
Hiroshi Maeda
Hiroshi Koyama
Hiroshi Takeuchi
Yuji Takeuchi
Katsumi Imae
Tomoo Harada
Hiroshi Koyama
Hiroshi Takeuchi
Yuji Takeuchi
Katsumi Imae
Tomoo Harada