Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP4237161
Kind Code:
B2
Abstract:
The present invention provides a semiconductor device manufacturing method of a semiconductor device having a contact plug, in which a contact hole formed by a surface portion of a high-concentration N-type diffusion layer formed on a semiconductor silicon substrate surface and an interlayer insulating film is implanted with indium ions at an energy ranging from 30 to 120 keV and an implantation amount ranging from 1.0x1013/cm2 to 5.0x1014/cm2 to grow an indium-containing layer on the surface portion of the high-concentration N-type diffusion layer at the bottom of the contact hole.
Inventors:
Noriaki Ikeda
Application Number:
JP2005136726A
Publication Date:
March 11, 2009
Filing Date:
May 09, 2005
Export Citation:
Assignee:
Elpida Memory Co., Ltd.
International Classes:
H01L21/768; H01L21/28
Domestic Patent References:
JP11297637A | ||||
JP2004158663A |
Attorney, Agent or Firm:
Akio Miyazaki
Ishibashi Masayuki
Masaaki Ogata
Ishibashi Masayuki
Masaaki Ogata