薄膜磁性体記憶装置 - Renesas Technology Corp.

Title:

薄膜磁性体記憶装置

Document Type and Number:

Japanese Patent JP4262969

Kind Code:

B2

Abstract:

In this MRAM device, a memory block is divided into 4 regions, and 4 constant current circuits are respectively provided corresponding to the 4 regions. Bit line drivers select 2 bit lines from each of the 4 regions, that is, 8 bit lines are selected. Bit line drivers supply, to each bit line, an output current from the constant current circuit corresponding to that bit line. Accordingly, a write current flowing through a bit line can be stabilized, and stable data writing can be achieved.

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Inventors:

Tsukasa Oishi

Application Number:

JP2002353640A

Publication Date:

May 13, 2009

Filing Date:

December 05, 2002

Export Citation:

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Assignee:

Renesas Technology Corp.

International Classes:

G11C11/15; H01L21/8246; H01L27/105; H01L43/08

Domestic Patent References:

JP2002288979A
JP2002222589A
JP2002124079A
JP2002231904A

Attorney, Agent or Firm:

Kuro Fukami
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai

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