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Title:
外部記憶装置
Document Type and Number:
Japanese Patent JP4357304
Kind Code:
B2
Abstract:
By providing registers for each block constituting the flash memory, based on the use state and the erase count information stored in the registers, the plurality of blocks are classified into n groups according to the erase count by the control circuit, and of the blocks that can be used for writing of one classified group, writing of data is performed in the block constitution sequence. When all the blocks of one group are used, data is written to blocks that can be used for writing of another group selected in a specified sequence. Sequentially between n groups, the item in charge for selecting the blocks used for data writing are alternated, and data is written to the selected block. As a result, considering leveling of the flash memory block erase count, it is possible to perform the write capability block selection process using hardware.

Inventors:
Itoshiro Itoshiro
Takabe Sonobe
Application Number:
JP2004004097A
Publication Date:
November 04, 2009
Filing Date:
January 09, 2004
Export Citation:
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Assignee:
Buffalo Co., Ltd.
International Classes:
G06F12/16; G06F12/00; G06F12/02; G11C16/04; G11C16/34; G11C29/00
Domestic Patent References:
JP8016482A
JP2001290792A
JP6282484A
JP5120154A
Attorney, Agent or Firm:
Meisei International Patent Office