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Title:
結晶性半導体膜の作製方法、該結晶性半導体膜を有する薄膜トランジスタの作製方法、該結晶性半導体膜を有する半導体装置の作製方法
Document Type and Number:
Japanese Patent JP4387144
Kind Code:
B2
Abstract:

To provide a new method of manufacturing crystalline semiconductor film, by which the positions of crystal grains and crystal grain boundaries can be controlled and, in particular, the orientation properties of crystal grains can be controlled.

The method of manufacturing crystalline semiconductor film includes a step of forming a semiconductor film containing a metallic element which accelerates the crystallization of an amorphous semiconductor film, a step of forming the amorphous semiconductor film in contact with the semiconductor film, and a step of forming a crystalline semiconductor film which is controlled in orientation properties by the metallic element. The method also includes a step of forming another crystalline semiconductor film by using the crystalline semiconductor film as a seed crystal. The crystallized amorphous semiconductor film and seed crystal are brought into contact with each other, in a linear or a planar state.

COPYRIGHT: (C)2005,JPO&NCIPI


Inventors:
Yasuyuki Arai
Yuko Tatemura
Application Number:
JP2003305488A
Publication Date:
December 16, 2009
Filing Date:
August 28, 2003
Export Citation:
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Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/20; H01L21/336; H01L51/50; H01L29/786; H05B33/14
Domestic Patent References:
JP8298326A
JP5029216A
JP2003173969A