Title:
CVDナノ多孔性シリカの低誘電率膜
Document Type and Number:
Japanese Patent JP4558206
Kind Code:
B2
Abstract:
A method and apparatus for depositing nano-porous low dielectric constant films by reaction of a silicon hydride containing compound or mixture optionally having thermally labile organic groups with a peroxide compound on the surface of a substrate. The deposited silicon oxide based film is annealed to form dispersed microscopic voids that remain in a nano-porous silicon oxide based film having a foam structure. The nano-porous silicon oxide based films are useful for filling gaps between metal lines with or without liner or cap layers. The nano-porous silicon oxide based films may also be used as an intermetal dielectric layer for fabricating dual damascene structures. Preferred nano-porous silicon oxide based films are produced by reaction of 1,3,5-trisilanacyclohexane, bis(formyloxysilano)methane, or bis(glyoxylylsilano)methane and hydrogen peroxide followed by a cure/anneal that includes a gradual increase in temperature.
Inventors:
Mandal, Robert, Pea.
David Cheung
Yau, wai-fan
David Cheung
Yau, wai-fan
Application Number:
JP2000577707A
Publication Date:
October 06, 2010
Filing Date:
October 21, 1999
Export Citation:
Assignee:
APPLIED MATERIALS,INCORPORATED
International Classes:
C23C16/40; H01L21/316; H01L21/768; H01L23/522
Domestic Patent References:
| JP10092808A | ||||
| JP6168930A | ||||
| JP9181063A | ||||
| JP9246375A | ||||
| JP10116904A |
Attorney, Agent or Firm:
Yoshiki Hasegawa
Ikeda adult
Choi
Yuichi Yamada
Yasuhito Suzuki
Ikeda adult
Choi
Yuichi Yamada
Yasuhito Suzuki