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Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP4558262
Kind Code:
B2
Abstract:
An operating semiconductor layer is formed in such a manner that amorphous silicon layer is formed to be shaped so that it has a wide region and a narrow region and the narrow region is connected to the wide region at a position asymmetric to the wide region, and the amorphous silicon layer is crystallized by scanning a CW laser beam from the wide region toward the narrow region in a state that a polycrystalline silicon layer as a heat-retaining layer encloses the narrow region from a side face through the silicon oxide layer.

Inventors:
Akito Hara
Yasuyuki Sano
Nobuo Sasaki
Michiko Takei
Application Number:
JP2002180425A
Publication Date:
October 06, 2010
Filing Date:
June 20, 2002
Export Citation:
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Assignee:
Sharp Corporation
International Classes:
H01L21/20; H01L21/336; H01L29/786
Domestic Patent References:
JP2001144300A
JP200068525A
JP2001144302A
JP59161014A
JP59102890A
JP6147627A
JP11214700A
JP4165613A
JP927453A
Attorney, Agent or Firm:
Takayoshi Kokubun