Title:
半導体装置
Document Type and Number:
Japanese Patent JP4776861
Kind Code:
B2
Abstract:
A semiconductor integrated circuit device has a semiconductor substrate with a plurality of pads disposed over a main surface of the substrate along one side thereof. A plurality of input/output cells are disposed corresponding to the plural pads over the main surface of the substrate. An internal circuit forming section is disposed over the main surface of the substrate. Power supply wirings for the internal circuit supply potentials to the internal circuit forming section. The plural input/output cells include signal cells and power supply cells for internal circuit respectively. Signal pads are disposed corresponding to the signal cells and electrically connected the signal cells. Power supply pads for the internal circuit are respectively disposed corresponding to the power supply cells and electrically connected to the power supply cells and the power supply wirings.
Inventors:
Satoshi Konishi
Mitsuaki Katagiri
Kazumasa Yanagisawa
Mitsuaki Katagiri
Kazumasa Yanagisawa
Application Number:
JP2002281607A
Publication Date:
September 21, 2011
Filing Date:
September 26, 2002
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H01L21/82; G11C7/10; H01L27/04; H01L21/822; H01L23/528
Domestic Patent References:
| JP10173057A | ||||
| JP3046352A | ||||
| JP3165543A | ||||
| JP2002222928A | ||||
| JP11186500A | ||||
| JP7094546A | ||||
| JP2000260880A |
Attorney, Agent or Firm:
Akita Haruki