Title:
半導体装置
Document Type and Number:
Japanese Patent JP4786805
Kind Code:
B2
Abstract:
The yield of a semiconductor device is improved which has a large-scale logic circuit or which has both a logic circuit and a memory. A basic circuit block is provided with an input/output circuit. A transmission line and a branch line connect the input/output circuits so that information can be exchanged through the input/output circuits between one basic circuit block and another basic circuit block. The memory in each basic circuit block or in each input/output circuit can be programmed from the outside to designate the destination of a signal. By thus changing the program in the memory, the transmission destination of a signal can be changed to give various functions efficiently with a limited circuit scale. Moreover, if a basic circuit block fails another basic circuit block substitutes for it to improve the yield drastically.
Inventors:
Hiroshi Iwata
Tomohisa Okuno
Akihide Shibata
Seizo Kakimoto
Tomohisa Okuno
Akihide Shibata
Seizo Kakimoto
Application Number:
JP2001040013A
Publication Date:
October 05, 2011
Filing Date:
February 16, 2001
Export Citation:
Assignee:
Sharp Corporation
International Classes:
H01L21/822; H01L27/02; H01L27/04; H01L27/118
Domestic Patent References:
| JP200273531A | ||||
| JP10313061A |
Attorney, Agent or Firm:
Aoyama Aoi
Hiroshi Yamazaki
Hiroshi Yamazaki