Title:
情報処理装置及び不揮発性半導体メモリドライブ
Document Type and Number:
Japanese Patent JP4829342
Kind Code:
B2
Abstract:
A control unit of a nonvolatile semiconductor memory drive has a first erase mode in which an address management table, which is indicative of a correspondency between logical block addresses and physical addresses of a nonvolatile semiconductor memory, is initialized to set the memory area of the nonvolatile semiconductor memory in a state in which no user data is written, a second erase mode in which the address management table is initialized to set the memory area in a state in which no user data is written, and the blocks, other than a defective block, which are included in the memory area, are erased, and a third erase mode in which the address management table is initialized to set the memory area in a state in which no user data is written, and the blocks, including the defective block, which are included in the memory area, are erased.
Inventors:
Takehiko Kurashige
Application Number:
JP2009503773A
Publication Date:
December 07, 2011
Filing Date:
November 07, 2008
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G06F12/00; G06F21/60; G06F21/79
Domestic Patent References:
| JP2000011677A | 2000-01-14 | |||
| JP2004240660A | 2004-08-26 | |||
| JP2005135544A | 2005-05-26 |
Foreign References:
| WO2006067853A1 | 2006-06-29 | |||
| WO2008016081A1 | 2008-02-07 |
Attorney, Agent or Firm:
Kurata Masatoshi
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara