Title:
コラム経路回路
Document Type and Number:
Japanese Patent JP4889348
Kind Code:
B2
Abstract:
A column path circuit includes address transition detectors which detect level transition of page address signals, thereby outputting transition detection signals each having a predetermined enable period, respectively. A detection signal coupler logically operates on the transition detection signals respectively outputted from the address transition detectors, and outputs a signal representing the results of the logical operation. A ready signal generator outputs a strobe ready signal having a predetermined enable period in response to an enabled state of the signal outputted from the detection signal coupler. A strobe signal generator generates a read strobe signal and a page address strobe signal for latch of the page address signals in response to the strobe ready signal. Page address buffers are enabled by the page address strobe signal, and latch the page address signals, thereby buffering the page address signals, a page address decoder which decodes the buffered page address signals respectively outputted from the page address buffers. And, a column selection signal generator outputs column selection signals respectively corresponding to the decoded page address signals in response to the read strobe signal.
Inventors:
Lee
Application Number:
JP2006104230A
Publication Date:
March 07, 2012
Filing Date:
April 05, 2006
Export Citation:
Assignee:
HYNIX SEMICONDUCTOR INC.
International Classes:
G11C11/408; G11C11/403
Domestic Patent References:
| JP2003297080A | ||||
| JP2003317472A |
Foreign References:
| US20040015663 |
Attorney, Agent or Firm:
Yasuo Ishikawa
Takahiro Imai
Kazuyuki Oku
Takahiro Imai
Kazuyuki Oku