Title:
プログラム及び半導体装置
Document Type and Number:
Japanese Patent JP5301019
Kind Code:
B2
Abstract:
A semiconductor device has an arithmetic processing circuit provided with an arithmetic circuit and a control circuit and a memory circuit provided with a ROM and a RAM, where the arithmetic processing circuit and the memory circuit are connected to each other through an address bus and a data bus, a machine language program executed using the arithmetic processing circuit is stored in the ROM, the RAM has a plurality of banks, processing data obtained by executing the machine language program is divided into a plurality of stacks to be written to the plurality of banks, and the arithmetic processing circuit is operated in accordance with the machine language program so that, in the plurality of stacks stored in the plurality of banks, a stack of which data is not used until the machine language program is terminated is omitted and contiguous stacks are written to the same bank.
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Inventors:
Hiroshi Muho
Yoshimoto Kurokawa
Masami Endo
Yoshimoto Kurokawa
Masami Endo
Application Number:
JP2012162204A
Publication Date:
September 25, 2013
Filing Date:
July 23, 2012
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G06F9/45
Domestic Patent References:
| JP55084090A | ||||
| JP62242239A | ||||
| JP4236628A | ||||
| JP2000222285A | ||||
| JP2004272448A | ||||
| JP2006146998A |