Title:
データ処理装置のための相互接続論理
Document Type and Number:
Japanese Patent JP5322412
Kind Code:
B2
Abstract:
An interconnect logic and method are provided for controlling transaction reordering by slave logic units coupled to the interconnect logic. The interconnect logic couples master logic units and slave logic units to enable transactions to be performed, each transaction having a transaction identifier associated therewith. ID aliasing logic is associated with at least a subset of slave logic units, with each slave logic unit in that at least a subset being able to issue response transfers for different transactions out of order with respect to the order of receipt by that slave logic unit of the address transfers of those transactions. For at least a subset of the transactions, if the slave logic unit involved in that transaction is associated with the ID aliasing logic, the ID aliasing logic is operable to replace the transaction identifier for that transaction with a predetermined identifier and then to forward the address transfer of the transaction along with that predetermined identifier to the slave logic unit. For any transactions that have their transaction identifier replaced with the predetermined identifier, the slave logic unit will not then perform any reordering since the same identifier, namely the predetermined identifier, is associated with each of those transactions. For any response transfer issue by the slave logic unit with the predetermined identifier, the ID aliasing logic replaces that predetermined identifier with the original transaction identifier removed previously so as to enable the routing of that data transfer via the interconnect logic to the appropriate master logic unit. This provides a very simple and effective mechanism for reducing the occurrence of a deadlock within the interconnect logic.
Inventors:
Alistair Clone Bruce
Application Number:
JP2007204889A
Publication Date:
October 23, 2013
Filing Date:
August 07, 2007
Export Citation:
Assignee:
RM Limited
International Classes:
G06F15/173; G06F13/14; G06F13/36
Domestic Patent References:
| JP2002319032A | ||||
| JP2002542539A |
Other References:
「ハッカーズセキュリティ」,PC Japan 第9巻 第2号,日本,ソフトバンクパブリッシング株式会社,2004年 2月 1日,140頁~143頁
今澤 傘之輔,「ルータ・セキュリティソフトを理解する鍵は「ポート」にあった! 安全・快適ネットワークのための納得!「ポート」入門」,アスキー.PC 第7巻 第9号,日本,株式会社アスキー,2004年 9月10日,60頁~67頁
今澤 傘之輔,「ルータ・セキュリティソフトを理解する鍵は「ポート」にあった! 安全・快適ネットワークのための納得!「ポート」入門」,アスキー.PC 第7巻 第9号,日本,株式会社アスキー,2004年 9月10日,60頁~67頁
Attorney, Agent or Firm:
Hideto Asamura
Hajime Asamura
Hayashi Zouzo
Kuniaki Shimizu
Hajime Asamura
Hayashi Zouzo
Kuniaki Shimizu