Title:
暗号処理装置
Document Type and Number:
Japanese Patent JP5338327
Kind Code:
B2
Abstract:
A cipher processing apparatus for arithmetic operations of an FO function and an FL function comprising: an FL function operating unit for generating a 2N-bit output based on a first extension key; a partial function operating unit for generating an N-bit output based on second and third extension keys; an N-bit intermediate register for storing an output of the partial operating unit; a 2N-bit first data register for storing data based on the output of the FL function operating unit; and a controller for making the partial function operating unit perform six cycles, inputting an output of the intermediate register to the FL function operating unit, and storing the data based on the output of the FL function operating unit in the first data register, in a first case in which the FL function uses a result of an arithmetic operation of the FO function.
Inventors:
Yamamoto Dai
Koichi Ito
Jun Yajima
Koichi Ito
Jun Yajima
Application Number:
JP2009007250A
Publication Date:
November 13, 2013
Filing Date:
January 16, 2009
Export Citation:
Assignee:
富士通株式会社
International Classes:
H04L9/06; G09C1/00
Domestic Patent References:
| JP10333569A | ||||
| JP2004240427A | ||||
| JP2005517967A | ||||
| JP2007535001A |
Other References:
佐藤証 他,W-CDMA標準暗号KASUMIの小型回路実装,マルチメディア,分散,協調とモバイル(DICOMO 2002)シンポジウム論文集,2002年 7月 3日,p.161-164
山本大 他,共通鍵ブロック暗号MISTY1の小型ハードウェア実装評価,2008年暗号と情報セキュリティシンポジウム講演論文集,2008年 1月22日
山本大 他,共通鍵ブロック暗号MISTY1の小型ハードウェア実装評価,2008年暗号と情報セキュリティシンポジウム講演論文集,2008年 1月22日
Attorney, Agent or Firm:
Hideo Akazawa