Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5381053
Kind Code:
B2
Abstract:
A method of manufacturing a semiconductor device having a first memory cell array region and a second memory cell array region, the method includes forming an active region on a surface layer of a semiconductor substrate, forming a first word line extending in a first direction on the gate insulating film in the first memory cell array region, and forming a second word line extending in a second direction crossing the first direction on the gate insulating film in the second memory cell array region, wherein the ion implantation into the active region is performed from a direction that is inclined from a direction vertical to the surface of the semiconductor substrate and is oblique with respect to both the first direction and the second direction.
Inventors:
Hiroyuki Ogawa
Hideyuki Kojima
Hideyuki Kojima
Application Number:
JP2008306677A
Publication Date:
January 08, 2014
Filing Date:
December 01, 2008
Export Citation:
Assignee:
Fujitsu Semiconductor Limited
International Classes:
H01L21/8242; H01L21/8234; H01L27/06; H01L27/088; H01L27/108
Domestic Patent References:
| JP2003258125A | ||||
| JP2000252445A | ||||
| JP2001176984A | ||||
| JP2006503439A |
Attorney, Agent or Firm:
Keizo Okamoto