ゲート駆動回路 - 三星ディスプレイ株式會社ＳａｍｓｕｎｇＤｉｓｐｌａｙＣｏ．，Ｌｔｄ．

Title:

ゲート駆動回路

Document Type and Number:

Japanese Patent JP5666864

Kind Code:

B2

Abstract:

A gate driving circuit includes N stages (where N is a natural number greater than or equal to 2). The N stages are cascaded, and each of the N stages has a gate line connected thereto. A first stage group includes k stages of the N stages (where k is a natural number less than N), and the first stage group outputs a first output signal in response to a start signal. A second stage group (including N−k stages) generates a second output signal in response to the first output signal and outputs the second output signal to a corresponding gate line. The first stage group includes a first buffer and a second buffer, each of which receives the start signal. A size of the first buffer is smaller than a size of the second buffer.

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Inventors:

金 ▲ヒョク▼ 珍
朴徑浩
盧相龍
趙榮濟
崔國 ▲ヒュン▼
金容照
金性 ▲ホン▼
金孝燮

Application Number:

JP2010212101A

Publication Date:

February 12, 2015

Filing Date:

September 22, 2010

Export Citation:

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Assignee:

三星ディスプレイ株式會社ＳａｍｓｕｎｇＤｉｓｐｌａｙＣｏ．，Ｌｔｄ．

International Classes:

G09G3/36; G02F1/133; G09G3/20

Attorney, Agent or Firm:

Takuji Yamashita

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