Title:
バイアス電流モニタおよびアンプのための制御機構
Document Type and Number:
Japanese Patent JP5694490
Kind Code:
B2
Abstract:
Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.
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| JPS5826209 | 【考案の名称】バイアス回路 |
| WO/1997/040577 | PROCESS FOR CONTROLLING THE POWER OF THE TRANSMISSION AMPLIFIER OF RADIO EQUIPMENT |
Inventors:
Thomas Dee. Marla
Aristotle Hadzi Christos
Nathan M. Presser
Aristotle Hadzi Christos
Nathan M. Presser
Application Number:
JP2013249654A
Publication Date:
April 01, 2015
Filing Date:
December 02, 2013
Export Citation:
Assignee:
QUALCOMM INCORPORATED
International Classes:
H03F1/30; H03F3/19; H03F3/24
Domestic Patent References:
| JP2001284984A | ||||
| JP2004328107A | ||||
| JP2010114689A |
Foreign References:
| GB2448525A |
Attorney, Agent or Firm:
Kurata Masatoshi
Yoshihiro Fukuhara
Nobuhisa Nogawa
Takashi Mine
Naoki Kono
Katsu Sunagawa
Morisezo Iseki
Takao Ako
Tadashi Inoue
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi
Yoshihiro Fukuhara
Nobuhisa Nogawa
Takashi Mine
Naoki Kono
Katsu Sunagawa
Morisezo Iseki
Takao Ako
Tadashi Inoue
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi