Title:
電界効果トランジスタおよびその作製方法
Document Type and Number:
Japanese Patent JP5780836
Kind Code:
B2
Abstract:
Provided is a novel structure of a field effect transistor using a metal-semiconductor junction. The field effect transistor includes a wiring which is provided over a substrate and also functions as a gate electrode; an insulating film which is provided over the wiring, has substantially the same shape as the wiring, and also functions as a gate insulating film; a semiconductor layer which is provided over the insulating film and includes an oxide semiconductor and the like; an oxide insulating layer which is provided over the semiconductor layer and whose thickness is 5 times or more as large as the sum of the thickness of the insulating film and the thickness of the semiconductor layer or 100 nm or more; and wirings which are connected to the semiconductor layer through openings provided in the oxide insulating layer.
Inventors:
Yasuhiko Takemura
Application Number:
JP2011122996A
Publication Date:
September 16, 2015
Filing Date:
June 01, 2011
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/336; H01L29/786
Domestic Patent References:
| JP2007258675A | ||||
| JP2010021520A | ||||
| JP10189994A | ||||
| JP2008175930A | ||||
| JP2008070876A |