Title:
同期式カメラ
Document Type and Number:
Japanese Patent JP5802727
Kind Code:
B2
Abstract:
A low-pass filter operation circuit 113 constitutes a serial interface circuit, which enables communication conforming to the serial bus standard including IEEE 1394 and USB 3.0, together with a timer register 114, a packet receiving circuit 111, and a packet transmitting circuit 112. Further, the low-pass filter operation circuit 113 performs a correction process of gradually increasing or decreasing an internal timer value counted by the timer register 114 by a unit count value of the timer register 114, thereby converging the deviation. A timer operation circuit 15 calculates a timer reference value, corresponding to the timing at which synchronization is to be carried out next, common to cameras 1, ..., 1, on the basis of a timer value maintained in the timer register 114, and a frame rate generated by a CPU 14.
Inventors:
Kishi Junji
Application Number:
JP2013233304A
Publication Date:
October 28, 2015
Filing Date:
November 11, 2013
Export Citation:
Assignee:
Toshiba Terry Co., Ltd.
International Classes:
H04N5/073; H04N5/232; H04N7/18
Domestic Patent References:
| JP2009017413A | ||||
| JP2006203817A | ||||
| JP2011155410A | ||||
| JP2002247408A | ||||
| JP2007280459A |
Foreign References:
| WO2000072597A1 | ||||
| WO2011092869A1 |
Attorney, Agent or Firm:
Suzue International Patent Office
Satoshi Kono
Sadao Muramatsu
Shoji Suzue
Satoshi Kono
Sadao Muramatsu
Shoji Suzue