Title:
電子デバイス及びその製造方法
Document Type and Number:
Japanese Patent JP5810693
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an electronic device with high reliability in which when trying to suppress deformation due to the difference of coefficients of thermal expansion between the through electrode and a substrate or the like, the degradation of device characteristics due to a side surface shape of a through electrode can be suppressed without increasing a number of steps of a manufacturing process.SOLUTION: An electronic device includes: a substrate 1; wiring 18 formed above a surface of the substrate 1; and a through-via 30 penetrating the substrate 1 from a back surface of the substrate 1, and formed in a through-hole 1A in which a first opening hole 1Aa and a second opening hole 1Ab having a total area of the opening smaller than the first opening hole 1Aa are connected in a depth direction of the substrate 1. In the through-via 30, a first electrode portion 30a formed in the first opening hole 1Aa and a second electrode portion 30b formed in the second opening hole 1Ab are integrally formed on the outermost side surfaces.
Inventors:
Hideki Kitada
Application Number:
JP2011152058A
Publication Date:
November 11, 2015
Filing Date:
July 08, 2011
Export Citation:
Assignee:
富士通株式会社
International Classes:
H01L21/3205; H01L21/768; H01L23/522; H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
| JP2010192481A | ||||
| JP2005268456A | ||||
| JP2009088013A | ||||
| JP2007081304A | ||||
| JP2010267695A | ||||
| JP2009049141A |
Attorney, Agent or Firm:
Takayoshi Kokubun