Title:
不揮発性メモリ装置及びその製造方法
Document Type and Number:
Japanese Patent JP5823238
Kind Code:
B2
Abstract:
A non-volatile memory device includes a semiconductor substrate having a peripheral circuit region and a cell region, wherein the cell region of the semiconductor substrate is lower in height than the peripheral circuit region of the semiconductor substrate, a control gate structure disposed over the cell region of the semiconductor substrate and comprising a plurality of inter-layer dielectric layers that are alternately stacked with a plurality of control gate electrodes, a first insulation layer covering the cell region of the semiconductor substrate where the control gate structure is formed, a selection gate electrode disposed over the first insulation layer, and a peripheral circuit device disposed over the peripheral circuit region of the semiconductor substrate.
Inventors:
Park Hei Soo
Application Number:
JP2011223556A
Publication Date:
November 25, 2015
Filing Date:
October 11, 2011
Export Citation:
Assignee:
SK hynix Inc.
International Classes:
H01L21/8247; H01L21/336; H01L27/10; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP2008263029A | ||||
| JP2010114369A | ||||
| JP2011049395A | ||||
| JP2011049561A | ||||
| JP2006128390A | ||||
| JP2010093269A |
Foreign References:
| US20080253183 | ||||
| US20060091556 |
Attorney, Agent or Firm:
Nakagawa International Patent Office
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