Title:
半導体装置
Document Type and Number:
Japanese Patent JP5839976
Kind Code:
B2
Abstract:
An object is to provide a semiconductor memory device capable of shortening writing operation by concurrently determining potentials of memory cells on one word line. A plurality of transistors having switching characteristics are connected to one potential control circuit, whereby writing potentials are determined concurrently. A potential continues to be changed (raised or decreased) stepwise, a desired potential is determined while changing the potential, and whether data resulted from reading with respect to written data is correct or not is continuously checked, so that high-precision writing operation and high-precision reading operation can be achieved. In addition, favorable switching characteristics and holding characteristics of a transistor including an oxide semiconductor are utilized.
Inventors:
Koichiro Kamata
Application Number:
JP2011275497A
Publication Date:
January 06, 2016
Filing Date:
December 16, 2011
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
G11C11/405; G11C11/56; H01L21/8242; H01L27/10; H01L27/108
Domestic Patent References:
| JP2002368226A | ||||
| JP3116494A | ||||
| JP2004234707A | ||||
| JP2011187145A | ||||
| JP2000235799A | ||||
| JP201274125A | ||||
| JP201279400A |
Foreign References:
| WO2007015358A1 |