Title:
半導体装置
Document Type and Number:
Japanese Patent JP5926125
Kind Code:
B2
Abstract:
A frequency tracking loop receives a result from a phase detector that detects an advance and a retard of a phase between input data and an extracted clock signal, and conducts a control to reduce a frequency deviation between the input data and the extracted clock signal. A phase interpolator adjusts a phase of the clock signal subjected to spread-spectrum frequency modulation on the basis result of the frequency deviation in the frequency tracking loop, and outputs the extracted clock signal. In the frequency tracking loop, the frequency deviation between the data signal and the clock signal is corrected to offset a variation of the frequency of the clock signal, on the basis of the frequency modulation information related to the clock signal subjected to the spread-spectrum frequency modulation which is input to the phase interpolator. The frequency of the clock signal seemingly follows the frequency of the data signal.
Inventors:
Masahiro Takeuchi
Application Number:
JP2012130777A
Publication Date:
May 25, 2016
Filing Date:
June 08, 2012
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H04L7/033; H03L7/08
Domestic Patent References:
| JP2008263508A | ||||
| JP2011234009A |
Foreign References:
| US20040071251 |
Attorney, Agent or Firm:
Kato Asamichi