Title:
半導体装置
Document Type and Number:
Japanese Patent JP6545587
Kind Code:
B2
Abstract:
This semiconductor device comprises a plurality of first conductive layers arranged above a substrate in a first direction intersecting an upper surface of the substrate. The conductive layers includes a portion in which positions of ends of the first conductive layers made different from each other in a second direction intersecting the first direction. Furthermore, this semiconductor device comprises a transistor electrically connected to the portion of the conductive layers. That transistor comprises: a channel layer extending in the first direction; a gate electrode layer disposed in a periphery of the channel layer; and a gate insulating layer disposed between the channel layer and the gate electrode layer.
Inventors:
Keiji Ikeda
Sakuma Research
Sai wicker Masumi
Sakuma Research
Sai wicker Masumi
Application Number:
JP2015181381A
Publication Date:
July 17, 2019
Filing Date:
September 15, 2015
Export Citation:
Assignee:
Toshiba Memory Corporation
International Classes:
H01L27/11575; H01L21/336; H01L27/10; H01L27/11548; H01L27/11556; H01L27/11582; H01L29/788; H01L29/792
Domestic Patent References:
| JP2015056642A | ||||
| JP2010123987A |
Foreign References:
| WO2010106922A1 | ||||
| US20120168849 |
Attorney, Agent or Firm:
Kisaragi International Patent Business Corporation