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Title:
3値信号発生装置及び3値信号発生方法とパルスパターン発生装置及びパルスパターン発生方法
Document Type and Number:
Japanese Patent JP6651568
Kind Code:
B2
Abstract:
To generate a three-value signal of LFPS signal set forth in USB 3.0/3.1 standard.SOLUTION: A three-value signal generator 2 comprises: a logic circuit unit 11 for outputting the logical product signal of a most significant bit and a least significant bit, the logical sum signal of a most significant bit and a least significant bit, and a most significant bit; a variable amplification unit 12 including a variable amplifier 12a for amplifying the logical product signal, a variable amplifier 12b for amplifying the most significant bit, and a variable amplifier 12c for amplifying the logical sum signal; an addition unit 13 for adding the output of the variable amplifier 12a and the output of the variable amplifier 12b together, and outputting a second addition signal consisting of a first addition signal resulting from this addition plus the output of the variable amplifier 12c; and a control unit 14 for defining that when the three-value signal is off, the most significant bit is at a low level and the least significant bit is at a high level, and controlling the amplitude levels of the variable amplifiers 12a, 12b, 12c independently of each other so that the amplitude levels of the first and second addition signals are equal.SELECTED DRAWING: Figure 1

Inventors:
Takashi Minami
Kazuya Shibata
Application Number:
JP2018073156A
Publication Date:
February 19, 2020
Filing Date:
April 05, 2018
Export Citation:
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Assignee:
Anritsu Co., Ltd.
International Classes:
H04L25/49
Domestic Patent References:
JP2018157393A
JP2011248896A
JP1054936A
JP2014241499A
Foreign References:
US4922249
CN107870833A
KR101585063B1
Attorney, Agent or Firm:
Norimitsu Nishimura
Noriyuki Suzuki



 
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