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Title:
プログラムバイアス及び高速センシングを有するセンスアンプ
Document Type and Number:
Japanese Patent JP6820409
Kind Code:
B2
Abstract:
Apparatuses, systems, and methods are disclosed for accessing non-volatile memory. A bit line is coupled to storage cells for a non-volatile memory element. A sense amplifier is coupled to a bit line. A sense amplifier includes a sense circuit and a bias circuit. A sense circuit senses an electrical property of a bit line for reading data from one or more storage cells, and a bias circuit applies a bias voltage to the bit line for writing data to one or more storage cells. A bias circuit and a sense circuit comprise separate parallel electrical paths within a sense amplifier.

Inventors:
Yong Ha Yu
Raoul Adrian Cernea
Sunpi Lee
Yen-Lun Lee
Qui Nguyen
Thailand-Yuen Tseng
Cynthia Shoe
Application Number:
JP2019513804A
Publication Date:
January 27, 2021
Filing Date:
August 31, 2017
Export Citation:
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Assignee:
SanDisk Technologies LLC
International Classes:
G11C16/24; G11C11/56
Domestic Patent References:
JP2003157681A
JP201055735A
JP2011146100A
Attorney, Agent or Firm:
Kaiyu International Patent Office