Title:
ゲートインターフェース工学のための新規方法
Document Type and Number:
Japanese Patent JP7450026
Kind Code:
B2
Abstract:
Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include removing a native oxide from a surface of a substrate. The methods may include delivering nitrous oxide to the substrate and thermally annealing the surface to form an oxide-containing interface. The methods may include delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber. The methods may include forming reactive ligands on an exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor. The methods may also include forming a high-k dielectric material overlying the substrate.
Inventors:
Hang, Steven Sea.
Application Number:
JP2022520200A
Publication Date:
March 14, 2024
Filing Date:
October 02, 2020
Export Citation:
Assignee:
APPLIED MATERIALS,INCORPORATED
International Classes:
H01L21/316; C23C16/02; H01L21/31; H01L21/336; H01L29/78
Domestic Patent References:
| JP2009529789A | ||||
| JP2014506013A | ||||
| JP2008500741A | ||||
| JP2004303894A |
Attorney, Agent or Firm:
Sonoda & Kobayashi Patent Attorneys Corporation