Title:
半導体装置およびその製造方法
Document Type and Number:
Japanese Patent JP7480000
Kind Code:
B2
Abstract:
A semiconductor device in an embodiment includes a substrate and a transistor. The transistor includes a source layer, a drain layer, a gate insulation film, a gate electrode, a contact plug and a first epitaxial layer. The source layer and the drain layer are provided in surface regions of the substrate, and contain an impurity. The gate insulation film is provided on the substrate between the source layer and the drain layer. The gate electrode is provided on the gate insulation film. The contact plug is provided so as to protrude to the source layer or the drain layer downward of a surface of the substrate. The first epitaxial layer is provided between the contact plug and the source layer or drain layer, and contains both the impurity and carbon.
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Inventors:
Tomoya Shioda
Yasunori Oshima
Taichi Iwasaki
Shota Yamagiwa
Hiroto Saito
Yasunori Oshima
Taichi Iwasaki
Shota Yamagiwa
Hiroto Saito
Application Number:
JP2020152066A
Publication Date:
May 09, 2024
Filing Date:
September 10, 2020
Export Citation:
Assignee:
Kioxia Corporation
International Classes:
H01L21/336; H01L21/8234; H01L27/088; H01L29/417; H01L29/78; H01L29/788; H01L29/792; H10B43/27; H10B43/40
Domestic Patent References:
| JP2019201040A | ||||
| JP2020031170A |
Foreign References:
| US20200075399 | ||||
| US20200035549 | ||||
| US20150270342 |
Attorney, Agent or Firm:
Yukitaka Nakamura
Satoru Asakura
Takeshi Sekine
Akira Akaoka
Kouki Naruse
Satoru Asakura
Takeshi Sekine
Akira Akaoka
Kouki Naruse